1. Field of the Invention
The present invention relates to a non-volatile memory device, and more specifically, to a non-volatile memory device achieving a fast data reading.
2. Description of the Background Art
Recently, non-volatile memory devices capable of storing a data in a non-volatile manner are widely used. A flash memory capable of higher integration can be named, for instance. Further, as a non-volatile memory device of a new generation, attention is especially given to a device such as an MRAM (Magnetic Random Access Memory) device that uses magnetic thin material to achieve non-volatile data storage, or a variable resistance memory device that uses thin film material called chalcogenide to store a data through phase transition. The MRAM device is disclosed in “A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, 2000 IEEE ISSCC Digest of Technical Papers, TA7.2. The variable resistance memory device is disclosed in “Forefront of Non-Volatile Memory/The Future in Intel's Mind: From Flash Memory to OUM,” Nikkei Microdevices, March, 2002, pp. 65-78.
In general configuration, when reading a stored data in a memory cell used as a memory element of such a non-volatile memory device, the data reading is performed as follows: a voltage of prescribed level is applied to the cell and a current passing through it (hereinafter referred to as a pass current) is detected.
For example, in order to read a stored data in an MTJ memory cell (MTJ: Magnetic Tunnel Junction), the data reading is achieved based on a pass current in MTJ memory cell that changes in accordance with an electric resistance corresponding to the level of the stored data level (i.e., the stored data).
As for a memory array of a large capacity, a general configuration includes a plurality of bit lines arranged corresponding to rows or columns, and a data line commonly provided to the plurality of bit lines and connected to a circuit detecting a stored data. In this configuration, when reading a data, a pass current is provided to a memory cell by charging the data line and a selected bit line to a prescribed voltage level, as described above. Thus, a charging period for charging the lines to the prescribed voltage level is required. The charging period increases as signal lines, such as a data line and a bit line, made longer in order to meet the demand for a memory array of a large capacity. A fast data reading is thus hindered undesirably.